1. Field of the Invention
The present invention relates to a debugging apparatus and method for debugging software by using a hardware simulator.
2. Description of the Related Art
In recent system LSI (large-scale integrated circuit) development, in order to verify whether or not design is correct before manufacturing hardware, simulation using a simulation model assuming virtual hardware, described with the HDL (Hardware Description Language), the C language or the like. In such simulation, by dumping the waveform of each signal pin, the value of an internal register, and the like in units of a clock signal of hardware, information relating to all signals produced within the hardware can be obtained. The designer of the hardware verifies the designed hardware based on dump information obtained from the hardware simulator.
The dump information is useful for verifying the hardware, and is also very useful for debugging software for controlling the hardware because of the following reason. That is, usually, in debugging of software, there is a limitation in obtained debug information and it is very difficult to obtain detailed information about hardware in units of a clock signal. Furthermore, in debugging of ordinary software, in order to know the state of hardware to be controlled, it is necessary to perform additional processing for debugging, and, as a result, hardware must perform additional operations. When utilizing dump information, such processing is unnecessary.
However, dump information obtained from a hardware simulator is primarily aimed at designing and verifying hardware. Accordingly, although the dump information is effective for verifying the hardware, it contains a considerable amount of information that is unnecessary for debugging software.
Furthermore, since tools for displaying dump information are designed for hardware designers, such as displaying signal waveforms, information necessary for a software designer is not displayed so as to be easily understood by the software designer.